M.Tech in VLSI Design & Embedded Systems
A two-year postgraduate programme focused on chip design, embedded systems and design automation for the semiconductor and electronics industry.
M.Tech in VLSI design & embedded systems overview
The programme prepares engineers to design, verify and integrate digital and analogue systems using industry-standard design flows and tools. Students experience:
Complete VLSI design flow
Working across architecture, logic design, synthesis, physical design and verification using industry-grade EDA tools.
Analogue and digital circuit design
Hands-on design, simulation and layout using Cadence Virtuoso across multiple technology nodes.
Embedded systems foundations
Learning embedded architectures, device modelling, fabrication concepts and hardware–software integration.
Advanced electives and research
Exploring areas such as low-power design, hardware security, testing, FPGA systems and machine learning for VLSI.
Programme details
Overview
Mahindra University offers a two-year M.Tech programme in VLSI Design and Embedded Systems, designed to develop advanced expertise in semiconductor design and embedded technologies. The curriculum covers key areas such as VLSI design, advanced computer architecture, algorithms for design automation, machine learning for VLSI design, low-power VLSI design, logic synthesis, design for testability, physical verification flows, and device and process simulation of semiconductor devices.
Advanced laboratory facilities
- Mahindra University has established a state-of-the-art laboratory that provides students with access to the latest design automation tools from leading Electronic Design Automation (EDA) companies.
- Students gain hands-on experience using the Synopsys tool suite, covering the complete design flow—from architectural design to physical verification. Tools available include Design Compiler, ICC2, PrimeTime, StarRCXT and Sentaurus TCAD, enabling device and process simulation, interconnect modelling and extraction.
- Students also learn analogue and digital full-custom circuit design using Cadence Virtuoso, with technologies such as UMC 65nm, GPDK 45nm, 90nm and 180nm. Additional Cadence tools—including Assura, Innovus, Incisive and Genus—support training in circuit-level physical design and verification, gate-level design and functional simulation, synthesis and pre-layout timing analysis.
- These facilities enable students to explore innovative design ideas and gain practical experience with industry-standard semiconductor design tools.
Career opportunities
Graduates of the programme can pursue careers with leading semiconductor design and manufacturing companies such as Intel, Qualcomm, Synopsys, Broadcom, AMD, NVIDIA, Apple, TSMC, GlobalFoundries and Samsung, among others.
Link: MU Test Syllabus
| Course | L-T-P | Credits |
|---|---|---|
| VLSI Design | 3-0-0 | 3 |
| Semiconductor Device Modelling and Fabrication | 3-0-0 | 3 |
| Embedded Systems | 3-0-0 | 3 |
| Logic Synthesis and Verification | 2-0-0 | 2 |
| Computer Organization and Architecture | 3-0-0 | 3 |
| Embedded Systems Lab | 0-0-2 | 1 |
| VLSI Design Lab | 0-0-2 | 1 |
| Logic Synthesis and Verification Lab | 0-0-2 | 1 |
| Semiconductor Device Modelling Lab | 0-0-2 | 1 |
| Communication Skills | 2-0-0 | 2 |
| Course | L-T-P | Credits |
|---|---|---|
| VLSI Digital Signal Processing | 3-0-0 | 3 |
| Low Power VLSI Design | 3-0-0 | 3 |
| Physical Design Automation | 3-0-0 | 3 |
| Hardware/Software Codesign | 3-0-0 | 3 |
| Analog CMOS IC Design | 3-0-0 | 3 |
| Physical Design Automation Lab | 0-0-2 | 1 |
| Embedded Programming Lab | 0-0-2 | 1 |
| Analog CMOS IC Design Lab | 0-0-2 | 1 |
| Scripting Languages for Electronic Design Automation (EDA) | 0-0-2 | 1 |
| Course | L-T-P | Credits |
|---|---|---|
| Elective I | 3-0-0 | 3 |
| Research Project and Seminar | 0-2-4 | 4 |
| Elective II | 3-0-0 | 3 |
| Elective III | 3-0-0 | 3 |
| Course | L-T-P | Credits |
|---|---|---|
| Masters’ Thesis | 0-0-24 | 12 |
| Course | L-T-P | Credits |
|---|---|---|
| FPGA Based System Design | 3-0-0 | 3 |
| Memory Design & Testing | 3-0-0 | 3 |
| Semiconductor Devices for High Speed Applications | 3-0-0 | 3 |
| Flexible & Wearable Sensors | 3-0-0 | 3 |
| Fault Tolerant Systems | 3-0-0 | 3 |
| MEMS & NEMS | 3-0-0 | 3 |
| Hardware Security | 3-0-0 | 3 |
| Pattern Recognition and Applications | 3-0-0 | 3 |
| Digital Image Processing and Computer Vision | 3-0-0 | 3 |
| High Performance Computing | 3-0-0 | 3 |
| Internet of Things System Architecture and Design | 3-0-0 | 3 |
| Cyber-Physical Systems | 3-0-0 | 3 |
| Testing and Design for Testability | 3-0-0 | 3 |
| Testing and Verification for Embedded Systems | 3-0-0 | 3 |
| Electronics Systems Packaging | 3-0-0 | 3 |
| Analog and Mixed-Signal Integrated Circuit Design | 3-0-0 | 3 |
| High-Level Synthesis | 3-0-0 | 3 |
| Analog Power Integrated Circuit Design | 3-0-0 | 3 |
| Machine Learning | 3-0-0 | 3 |
| Hardware Acceleration for ML Applications | 3-0-0 | 3 |
| Embedded AI Applications | 3-0-0 | 3 |
| Optoelectronic Devices | 3-0-0 | 3 |
| Modeling of Nanoscale Devices | 3-0-0 | 3 |
Eligibility
- Candidates must have completed a full-time bachelor’s degree from a recognised university or institute with a minimum aggregate of 60% marks or equivalent grade.
- Eligible degrees include B.E./B.Tech. in Electrical Engineering, Electrical and Electronics Engineering, Electronics and Communication Engineering, Telecommunication Engineering, Communication and Information Systems, Instrumentation Engineering, Automobile Engineering, Mechatronics Engineering, Electronics and Biomedical Engineering or Electronics and Computer Engineering.
- A valid GATE score in Electrical Engineering, Electronics and Communication Engineering or Instrumentation Engineering is mandatory.
- Candidates appearing for their final semester examination in the current year are also eligible to apply.
Admission process
- GATE-qualified candidates: Applicants with a valid GATE score and a percentile of 80 or above will be shortlisted for an interview.
- Non-GATE candidates: Applicants without a valid GATE score, or with a percentile below 80, must appear for a written test conducted by ECSE–Mahindra University, followed by an interview for shortlisted candidates.
Fee structure
- Tuition fee: ₹1,00,000 per annum
- Hostel fee: Additional (hostel stay is not mandatory)
FAQs
It focuses specifically on VLSI design and embedded systems, aligning coursework and labs with industry design and verification practices.
Students train on professional EDA tools from Synopsys and Cadence across digital and analogue design flows.
Each core course is paired with laboratory work and design projects using industry-style methodologies.
Yes. The advanced coursework and thesis component provide a strong foundation for doctoral study.
The curriculum is tightly focused on integrated circuit design, design automation and embedded systems rather than broad electronics topics.
