Inauguration of the New Synopsys-MU VLSI Design Lab
20th May 2022

Inauguration of the new Synopsys-MU VLSI Design Lab at Mahindra University

We are proud to announce the opening of the new Synopsys-MU VLSI Design Lab at Mahindra University under the direction of Dr. Ram Vemuri. The lab was inaugurated on May 20, 2022 by the esteemed Vice Chancellor Dr. Yaj Medury and Head of Hyderabad operations for Synopsys Mr. Narendra Korlepara.

This lab will provide hands on experience in VLSI design to undergraduate and graduate students with a focus on Embedded Systems and VLSI Design.